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<blockquote data-quote="sanzilla jackcat" data-source="post: 7224312" data-attributes="member: 131221"><p>bro after the Novermber 2008 FSB bus is dead. And in i7 and i9 they are using </p><p>QPI.In simple it reduces the parallel paths and increase the bandwidth of the </p><p>data.</p><p></p><p>They using serial technology to win that constrain, in physics you know this as</p><p>converting eneargy into electro magnetic energy.But with less Motherboard </p><p>conductor paths by using serial paths (QPI) they can increase the bandwidth.</p><p></p><p>This serial data paths are already used in the PIC-x bus.But that't not QPI.Just </p><p>a different word called PCI express.</p><p></p><p>In AMD they are introducing the hypertransport.The AMD's challenge to QPI is</p><p>hypertransport.</p><p></p><p>Don't go and ask these things in Unity plaza shops they won't give you correct </p><p>information,may be they actually don't know to explain technically or they hide</p><p>info as a business trick.</p></blockquote><p></p>
[QUOTE="sanzilla jackcat, post: 7224312, member: 131221"] bro after the Novermber 2008 FSB bus is dead. And in i7 and i9 they are using QPI.In simple it reduces the parallel paths and increase the bandwidth of the data. They using serial technology to win that constrain, in physics you know this as converting eneargy into electro magnetic energy.But with less Motherboard conductor paths by using serial paths (QPI) they can increase the bandwidth. This serial data paths are already used in the PIC-x bus.But that't not QPI.Just a different word called PCI express. In AMD they are introducing the hypertransport.The AMD's challenge to QPI is hypertransport. Don't go and ask these things in Unity plaza shops they won't give you correct information,may be they actually don't know to explain technically or they hide info as a business trick. [/QUOTE]
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