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Message: <blockquote data-quote="uocanu" data-source="post: 3236260" data-attributes="member: 2457">Model Clocking <a href="http://en.wikipedia.org/wiki/Thermal_Design_Power" target="_blank">TDP</a> <a href="http://en.wikipedia.org/w/index.php?title=Extended_Halt_Power&action=edit&redlink=1" target="_blank">EHP</a> L2 Cache Stepping Note   QX9770 3.20 GHz 136 W 2 x 6 MB 45nm (<a href="http://en.wikipedia.org/wiki/Intel_Core_microarchitecture#Future_processors" target="_blank">Future Processor</a>)   QX9650 3.00 GHz 130 W 16 W 2 x 6 MB 45nm                                QX6850 3.00 GHz 130 W 37 W 2 x 4 MB 65nm                                  QX6800 2.93 GHz 130 W 37 W 2 x 4 MB 65nm                                  QX6700 2.66 GHz 130 W 50 W 2 x 4 MB 65nm                                  Q9550 2.83 GHz 95 W 2 x 6 MB C0, C1 45nm (<a href="http://en.wikipedia.org/wiki/Intel_Core_microarchitecture#Future_processors" target="_blank">Future Processor</a>)   Q9450 2.67 GHz 95 W 2 x 6 MB C0, C1 45nm   Q9300 2.50 GHz 95 W 2 x 3 MB M1 45nm   Q6700 2.67 GHz 105 W 24 W 2 x 4 MB B3 65nm   Q6700 2.67 GHz 95 W 24 W 2 x 4 MB G0 65nm   Q6600 2.40 GHz 105 W 50 W 2 x 4 MB B3 65nm (CPUID=06F7h)   Q6600 2.40 GHz 95 W 24 W 2 x 4 MB G0 65nm(CPUID=06FBh)    ????? 2.66 GHz 48 W</blockquote>

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