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ElaKiri Talk!
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<blockquote data-quote="AnuradhaRa" data-source="post: 18089874" data-attributes="member: 325076"><p><img src="http://file2.answcdn.com/answ-cld/image/upload/h_320,c_fill,g_face:center,q_60,f_jpg/v1401502439/xxlre1tzflvqporolohz.png" alt="" class="fr-fic fr-dii fr-draggable " style="" /></p><p></p><p><span style="font-size: 12px"><span style="color: darkred">PCH - උඩ</span></span></p><p></p><p></p><p><span style="font-size: 12px"><span style="color: red">ICH - යට</span></span></p><p></p><p><img src="http://upload.wikimedia.org/wikipedia/commons/d/d8/Intel_4_Series_arch.png" alt="" class="fr-fic fr-dii fr-draggable " style="" /></p><p></p><p></p><p></p><p><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px"><u>PCH architecture</u></span></span></p><p><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px"></span></span></p><p><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px">As CPU speeds increased a </span></span><a href="http://en.wiktionary.org/wiki/bottleneck" target="_blank"><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px">bottleneck</span></span></a><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px"> eventually emerged between the processor and the </span></span><a href="http://en.wikipedia.org/wiki/Motherboard" target="_blank"><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px">motherboard</span></span></a><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px">, due to limitations caused by data transmission between the CPU and southbridge. </span></span></p><p><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px"></span></span></p><p><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px">Accordingly starting with the </span></span><a href="http://en.wikipedia.org/wiki/Intel_5_Series" target="_blank"><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px">Intel 5 Series</span></span></a><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px">, a new architecture was used where some functions of the north and south bridge chips were moved to the CPU, and others were consolidated into a </span></span><a href="http://en.wikipedia.org/wiki/Platform_Controller_Hub" target="_blank"><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px">Platform Controller Hub</span></span></a><span style="font-family: 'Comic Sans MS'"><span style="font-size: 18px"> (PCH).</span></span></p></blockquote><p></p>
[QUOTE="AnuradhaRa, post: 18089874, member: 325076"] [IMG]http://file2.answcdn.com/answ-cld/image/upload/h_320,c_fill,g_face:center,q_60,f_jpg/v1401502439/xxlre1tzflvqporolohz.png[/IMG] [SIZE=3][COLOR=darkred]PCH - උඩ[/COLOR][/SIZE] [SIZE=3][COLOR=red]ICH - යට[/COLOR][/SIZE] [IMG]http://upload.wikimedia.org/wikipedia/commons/d/d8/Intel_4_Series_arch.png[/IMG] [FONT=Comic Sans MS][SIZE=5][U]PCH architecture[/U] As CPU speeds increased a [/SIZE][/FONT][URL="http://en.wiktionary.org/wiki/bottleneck"][FONT=Comic Sans MS][SIZE=5]bottleneck[/SIZE][/FONT][/URL][FONT=Comic Sans MS][SIZE=5] eventually emerged between the processor and the [/SIZE][/FONT][URL="http://en.wikipedia.org/wiki/Motherboard"][FONT=Comic Sans MS][SIZE=5]motherboard[/SIZE][/FONT][/URL][FONT=Comic Sans MS][SIZE=5], due to limitations caused by data transmission between the CPU and southbridge. Accordingly starting with the [/SIZE][/FONT][URL="http://en.wikipedia.org/wiki/Intel_5_Series"][FONT=Comic Sans MS][SIZE=5]Intel 5 Series[/SIZE][/FONT][/URL][FONT=Comic Sans MS][SIZE=5], a new architecture was used where some functions of the north and south bridge chips were moved to the CPU, and others were consolidated into a [/SIZE][/FONT][URL="http://en.wikipedia.org/wiki/Platform_Controller_Hub"][FONT=Comic Sans MS][SIZE=5]Platform Controller Hub[/SIZE][/FONT][/URL][FONT=Comic Sans MS][SIZE=5] (PCH).[/SIZE][/FONT] [/QUOTE]
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Dahaya deken beduwama keeyada?
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