In late 2007, Intel will release a new embedded processor with an integrated memory controller, north bridge, and south bridge, HKEPC reports. Slides obtained by the site say the chip is code-named Tolapai, and that it will integrate a Pentium M processor core running at 600MHz-1.2GHz, 256KB of L2 cache, a memory controller with support for registered DDR2-800 memory, triple Gigabit Ethernet, PCI Express, Serial ATA, USB 2.0, accelerated security processing, accelerated network processing, and a number of additional I/O features.
Despite its level of integration, the chip is expected to have a thermal rating between 13W and 22W. For reference, Intel's current Core Solo chips are rated for 5.5-27W. Tolapai will be built on 65nm process technology, and it will come in a 1088-ball flip-chip ball grid array package. HKEPC says Intel will have Tolapai-based reference boards ready in the second quarter of this year, but that final hardware won't ship until later this year.
Despite its level of integration, the chip is expected to have a thermal rating between 13W and 22W. For reference, Intel's current Core Solo chips are rated for 5.5-27W. Tolapai will be built on 65nm process technology, and it will come in a 1088-ball flip-chip ball grid array package. HKEPC says Intel will have Tolapai-based reference boards ready in the second quarter of this year, but that final hardware won't ship until later this year.
