Analogue Digital Converter

[amilapradeep100]

මේ ගානේ D = 2K/T කියන්නෙ මොකක්ද මතන්ලා... කරකවලා ඇතෑරියා වගේ
In a laboratory experiment, a simple analogue to digital converter (SADC) is interfaced to an 8051-microcontroller unit (MCU) to measure analogue signals. SADC operates as follows.

When the microcontroller unit (MCU) sets the SOC (Start of Conversion) signal, then SADC read the input analogue signal (Vs, 0V <= Vs <= 2V) and start the conversion.

After conversion completed, SADC sets the interrupt signal EOC (End of Conversion) which will be sent to MCU to indicate the end of the operation.
The digital equivalent of the analogue signal is inversely proportional to the time (T seconds) between SOC and EOC signals. Hence, the digital equivalent (D) can be computed as D = 2K/T (where “K” is a predefined constant).

 

[Sonique]

Source daapan

 

[imhotep]

Not clear where you got this from.. For eg let's say, if you use a 8051 microcontroller with a ADC804 chip which has a resolution of 8 bits
The conversion time (the time it takes the ADC chip to convert the analog into a binary number) depends on the CLK R and CLK IN but the clock frequency has a limit - because the conversion time cannot be faster than 110 microsecs.
The VREF/2 pin determines the step size for the conversion. If left open, the analog voltage is taken as in the range of 0 to 5 (Vcc) and the step size becomes 5/256 or 19.5mV.
The digital data outputs D0 - D7 are read after the end of conversion ( when CS and RD forced low) and Digitalout = Vin/Step Size as far as I can recollect

 

[amilapradeep100]

Not clear where you got this from.. For eg let's say, if you use a 8051 microcontroller with a ADC804 chip which has a resolution of 8 bits
The conversion time (the time it takes the ADC chip to convert the analog into a binary number) depends on the CLK R and CLK IN but the clock frequency has a limit - because the conversion time cannot be faster than 110 microsecs.
The VREF/2 pin determines the step size for the conversion. If left open, the analog voltage is taken as in the range of 0 to 5 (Vcc) and the step size becomes 5/256 or 19.5mV.
The digital data outputs D0 - D7 are read after the end of conversion ( when CS and RD forced low) and Digitalout = Vin/Step Size as far as I can recollect

yep..only way of solving this is calculate time between WR pin and Interrupt signal and then solve D=k/T ..i got this after wasting one whole day..this is not ADC like ADC804..i thought same as ADC804 and fucked up..thnks mchannnn